Commonly used DFT methods include scan chain-based test methods and built-in self-test circuits.

The wafer test is completed by ATE and Prober; The finished product test is completed by ATE with high and low temperature impact airflow meter.

Failure mechanism of crimping IGBT power module package

Reliability is a measure of product durability.

DFT technology is simply to add DFT logic to the chip design, and then after the chip manufacturing is completed, test the chip through the added DFT logic in advance to select the chip with no problems.

WAT test structure usually includes all active and passive components of the process platform

After the chip is packaged, there may be potential defects, which may lead to unstable chip performance or potential defects in function.

SOC design process, including the whole process of digital circuit design front-end and back-end.