The heat dissipation of device packaging structures has shifted from single sided heat dissipation in both bonded wire and non bonded wire packages to double sided heat dissipation in de bonded wire packages, and then to multi sided heat dissipation. This represents the development trend of heat dissipation in power device packaging structures, that is, from a single heat dissipation path to multiple heat dissipation paths. This is also the result of device development and usage requirements forcing device packaging to require better heat dissipation performance. High thermal conductivity packaging materials and connection processes, debonded wire connections, large area contact, multiple heat dissipation paths simultaneously shortening the heat dissipation path, and reducing the thermal resistance of the heat dissipation path may be key features that future high-voltage, high-temperature, and high-power device packaging should have.

1. High thermal conductivity packaging materials and connection processes

For power device packaging, in order to achieve excellent thermal performance, it is necessary to first use high thermal conductivity packaging materials and advanced connection processes, so that the packaging materials and their connection layers are conducive to heat conduction. Generally, the coefficient of thermal expansion and thermal conductivity of metals and alloys are contradictory, but metal matrix composite (MMC) provide a good compromise. AlSiC has excellent thermal conductivity and can well match the thermal expansion of DBC, reducing the risk of thermal expansion stress and thermal or vibration failure. As a necessary component of the power module, the substrate plays a role in providing electrical connections, high-voltage insulation, and thermal dissipation paths. The ideal substrate material needs to have good thermal expansion matching, high thermal conductivity, high bending strength and high fracture toughness with other components connected to it.

There are usually two types of connection processes for power devices: welding and sintering. The welding process uses solder alloy connections, while the sintering process typically uses nano silver and nano copper connections. Solder alloys (such as SnPb and SnAgCu) are the most commonly used interconnect materials for chips and substrates. However, the thermal conductivity of traditional solder joint layers is usually low, only a few tens of W/(m · K) (Table 6). Nano metal sintering can achieve high thermal conductivity connections between packaging materials, with thermal conductivity generally in the hundreds, which is very conducive to heat conduction. At present, the nano metal sintering connection is still in the research stage and cannot achieve large-scale sintering connection.

2. Chip surface contact connection

Due to the need for chip lead bonding and ensuring the reliability and insulation of bonding quality, the bonding wire connection restricts the installation of heat sinks for heat dissipation through this bonding side, and only has a single heat dissipation path. To improve the heat dissipation performance, canceling the bonding line and replacing point contact connection with surface contact can increase the contact area between the electrode lead out component and the chip, that is, increase the heat dissipation area of the chip surface, which is an effective way to improve the heat dissipation capacity of the device. At the same time, it also reduces the parasitic inductance of the circuit caused by the bonding of long wires with smaller cross-sectional areas.

Using planar interconnection to achieve direct lead bonding (DLB) of the front power electrodes of the chip, its biggest feature is that the power terminals are directly connected to the surface electrodes of the chip. Compared to traditional point contact of lead bonding, this technology has a larger interconnection area between the electrode terminals and the chip surface, which can effectively reduce parasitic inductance and improve interconnection reliability.

3. Increase heat dissipation path

Traditional bonding wire connected devices only have a single heat dissipation path, and their thermal performance has reached its heat dissipation limit, which cannot meet the packaging requirements of higher power density. From the perspective of heat dissipation, it is undoubtedly beneficial for the device to have as many heat dissipation paths as possible. At present, the thermal characteristics of packaging materials cannot be significantly improved in the short term. In addition to the existing thermal conduction path on the back of the chip, new heat dissipation paths will be expanded to use the front of the chip as another heat dissipation path. Although components such as gaskets connected to the front of the chip may cause asymmetry in the packaging structure on both sides of the chip, the heat dissipation through the upper surface thermal path of the chip may not be the same as the heat dissipation through the lower surface thermal path of the chip, this double-sided heat dissipation capability can significantly reduce the thermal resistance of the device and significantly improve the heat dissipation performance of the device.

4. Shorten the heat dissipation distance

The heat generated by the chip loss inside the packaging device is mainly transferred from the junction to the device packaging shell through thermal conduction. According to the theory of heat transfer and the laws of heat transfer, shortening the distance along the heat transfer path is one of the effective ways to reduce the thermal resistance of the chip's heat dissipation path. Power device packaging is composed of a multi-layer structure. From the perspective of shortening the heat dissipation path, firstly, the thickness of each layer of packaging material can be reduced, and secondly, the number of layers of packaging material can be reduced.

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