What are the specific requirements for chip reliability?
2023-03-06 09:40:54

Under the wave of chip localization, the shipment volume and replacement rate of domestic chips have soared rapidly in recent years. According to the ratio of shipments, the domestic substitution rate of power management chips and RF front-end chips has exceeded 70% in the field of consumer electronics; In the field of industrial control and communication, the domestic substitution rate of power management and signal chain chips also exceeds 20%; In the field of automotive electronics, the domestic substitution rate of power management and power devices is less than 10%.

 

Chip reliability can be roughly divided into three categories: static reliability, production reliability and life reliability.

1、 Electrostatic reliability

Electrostatic reliability is mainly ESD (Electro Static discharge). As the most frequent cause of failure, ESD cannot be prevented and is the main culprit of customer complaints of terminal products. In the process of production, assembly, testing, storage and transportation, it is possible to accumulate electric charge in human body, instruments and equipment. If it contacts inadvertently, it will form discharge circuit path or even not contact with air, and the chip will be broken down by instantaneous high voltage, resulting in ESD failure.

(1). HBM (Human Body Model) - human charged model (standard JESD22-A114)

The human body is a good conductor, and it is easy to accumulate electric charges. Especially in dry winter, it often discharges to people or metal. HBM is to measure the static resistance of the chip when the human body releases the accumulated charge to the chip. Generally, manufacturers will require ± 500V step to measure the highest level, and ± 1000V is the minimum passing standard. Some products will require ± 2000V.

(2). CDM (Charge Device Model) - Charger device model (standard JESD22-C101)

The chip will also accumulate electric charge during processing, manufacturing, testing and transportation, and discharge in the subsequent pin contact. CDM measures the static electricity withstand capacity of the chip in the scenario of its own accumulated charge discharging to the ground. Generally, the manufacturer will require the passing standard to be ± 500V, and sometimes the pin at four corners will require a minimum of ± 750V.

(3). MM (Machine Model) --- machine model (standard JESD22-A115C)

When the processing machine or test machine is not well grounded, it will also accumulate electric charge and discharge when it contacts with the chip. MM measures the static resistance of the chip under the scenario that the accumulated charge of the machine is released to the chip. Because the current production and testing process is very standard, and the machine and workers are fully grounded, most manufacturers do not look at the MM capability now. If the card is required, ± 200V is enough, and a few high-standard customers will require ± 500V.

(4). LU (Latch-Up) --- Latch (standard JESD78E)

The combination of P well, N well and substrate in CMOS process will lead to the parasitic n-p-n-p structure. When one of the transistors is biased forward, positive feedback will occur to form a latch, and the current will become larger and larger, and finally the chip will be burned. LU measures the over-current capability of the chip under the latch effect. Generally, 1.5 * VCC, 100mA will be used as the passing standard.

(5). Surge - surge (IEC-61000-4-5)

The VBAT, VCC and VDD that supply power to the chip will not be stable all the time, and there will often be surges. Compared with ESD, the voltage level is very low, but the duration is long, and finally it will be burned. Surge measures the ability of the chip to withstand the surge voltage when the power supply pin surges. According to different application requirements, Power chips require higher requirements, and signal chips generally require 1.6-2 times VCC.

 

2、 Production reliability

Production reliability mainly refers to the quality control of wafer during packaging. If a certain process is not handled properly, the reliability of the later life will be greatly reduced. Generally, the packaging factory will be required to do it, and the chip factory does not need to invest energy.

(1). BP (Bond Pull Strength) - stringing tensile strength (standard MIL-STD-883-2011)

(2). BS (Bond Shear) - Bond Shear, BP supplement (standard JESD22-B116)

(3). DS (Die Shear Strength) - grain bonding strength (standard MIL-STD-883-2019)

(4). SD (Solderability) --- Solderability (standard JESD22-B102)

 

3、 Life-class reliability

Lifetime reliability is the most important factor to measure the chip specification, and the industry's commonly known commercial, industrial, and vehicle specifications are also reflected here. In order to predict how many years the chip can be used, the high temperature, high humidity and high pressure environment will generally be used to accelerate the chip aging, and then the service life of the chip can be obtained through conversion.

(1). PC (Precondition) - pretreatment (standard JESD22-A113)

PC is the pre-test of life reliability. 77 samples from three batches are baked, soaked and reflow welded for three times, and then the experimental products are distributed to other projects for testing.

(2). TC (Temperature Cycle) --- Temperature Cycle (standard JESD22-A104)

From low temperature to high temperature, the temperature changes slowly, which measures the chip's ability to withstand cold and hot shocks. Generally - 45 ° C~125 ° C, 1000 cycles; Some customers also require - 60 ° C~125 ° C, 500 cycles.

(3). TS (Temperature Shock) - temperature shock (standard is JESD22-A106)

Quickly test the chip's resistance to temperature shock from low to high temperature. Generally, - 45 ° C~125 ° C, dwell time of 10 minutes, movement time of 20 seconds, 300 or 500 cycles are required.

(4). AC (Autoclave) - autoclave/autoclave (standard JESD22-A102)

Use high temperature, high pressure and high humidity to test the chip's resistance to moisture. It is generally tested for 96 hours at 121 ℃, 100% RH and 205 kPa.

(5). THB (Temperature Humidity Bias) - temperature and humidity bias (standard JESD22-A101)

Similar to AC test, accelerated aging is required in high temperature and humidity environment, but bias voltage is required. It is generally at 85 ℃, 85% RH, powered on, and tested for 1000 hours.

(6). BHAST (Biased High Accelerated Temperature and Humidity Stress Test) - High Accelerated Stress Test (JESD22-A110)

Accelerate the invasion of moisture into products under high temperature, high humidity and high pressure. It is generally tested at 130 ℃, 85% RH and VCCmax for 96 hours; Or 110 ℃, 85% RH, VCCmax test for 264 hours. Because the test methods are similar, THB and HAST can do either.

(7). UHAST (Unbiased High Accelerated Temperature and Humidity Stress Test) - High Accelerated Stress Test (standard JESD22-A118)

Compared with BHAST, there is no need to add bias voltage, and everything else is the same.

(8). HTS (High Temperature Storage) - high temperature storage (standard JESD22-A103)

The storage time under high temperature environment is generally 150 ° C and 1000 hours.

(9). LTS (Low Temperature Storage) - low temperature storage (standard JESD22-A119)

The storage time in low temperature environment is generally required to be - 40 ° C and more than 168 hours. Because there are almost no low-temperature storage scenarios, most customers will not require this test.

(10). HTOL (High Temperature Operating Life) - High temperature operating life (standard is JESD22-A108)

HTOL can be said to be the most important item in reliability testing. It is the most appropriate to simulate the working environment of the chip, and then accelerate the aging of the chip through high temperature and high pressure, so as to calculate the service life of the chip. The industry generally refers to HTOL in terms of reliability hours. It is generally tested at 125 ° C, VCCmax and 1000 hours. The temperature acceleration factor is mainly related to the experimental temperature, service temperature and surface activation energy. Generally, the temperature acceleration factor corresponding to 1000 hours of HTOL at 125 ° C is 77.94, which corresponds to 8.9 years of operation at 55 ° C. Generally, the voltage for HTOL is 10% higher than the recommended maximum working voltage. Taking the recommended maximum working voltage of 1.8V as an example, the experimental voltage is 2V, and the voltage acceleration factor is 1.22. After adding the temperature acceleration factor, the total time acceleration factor is 93.3, which corresponds to the service life of 13.2 years under normal temperature, meeting most of the scenario applications.

(11). DT (Drop Test) --- Drop Test (standard JESD22-B111)

The terminal often falls and vibrates in use. DT measures the chip's ability to resist falling vibration. Generally, 1500G acceleration, 0.5ms half-sine wave period and 200 shocks are selected.

(12). MS (Mechanical Shock) - Mechanical shock (standard JESD-47)

In the pulse time of 0.5ms, 1500G acceleration impact pulse, X/Y/Z three axes five times each.

 

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