Since ancient times, people have mastered testing technology. The purpose of production testing is to separate good items from defective items. In the integrated circuit industry, the goal of testing is to separate chips with correct functions from defective chips, so as to ensure that customers use chips with complete functions.

With the increasing integration of circuits, the cost of production testing is also increasing. In order to reduce the cost and difficulty of testing and improve the quality and yield of chips, we need to design for test (DFT) for chips. Design for testability is to add a special test structure on the premise of ensuring the function in the chip design process. After the completion of the chip manufacturing, DFT test is carried out. If there are defects in the manufacturing or packaging process, and the chip cannot work normally, this chip can be screened through DFT test.

Testing during chip manufacturing and packaging can be broadly divided into the following three categories:

1.Wafer Acceptance Test(WAT)

2.Wafer Sort(CP)

3.Final Test(FT)

The WAT test has nothing to do with DFT. It is mainly used to check whether there is a problem with the FAB manufacturing process. It does not test the chip, but tests the special structure on the scribe line between the die and the die.

CP is used to test each die on the wafer. In fact, only the dies that pass the CP test can be packaged, and the dies that fail the test will be eliminated.

FT test is the test after die encapsulation. If there is no exception, it will go to the customer.

What is DFT specifically?

In order to make the chip easy to test, additional logic is added or modified in the design, and input and output ports are added, but this design will not change the function of the chip. As shown in the figure below: DFT is to add an additional input port (ASIC_TKST) and add MUX in the design so that the clock pin of registers F0 and F1 can be directly controlled by the input clock port CLK during the test.

Measurable design is rich in content, mainly divided into four categories: Scan Chain, Border Scan, MBIST and ATPG.

When we conduct production test on the chip that has been manufactured, first insert the chip into the automatic test equipment (ATE), and then input the test program. The test program contains the test vector generated by ATPG. The test vector simply understands that it contains the input value and the expected value. If the actual value and the expected value of the ATE collection are inconsistent, the chip can be judged to be faulty.

The TS-780 developed by Intercooling Cryogenics Technology is used in automatic test equipment (ATE), providing ATE with a wider temperature range from - 70 ℃ to+225 ℃, and a very advanced temperature conversion test capability. Temperature conversion from - 55 ℃ to+125 ℃ for about 10 seconds; It accelerates the testing speed of DTF in ATE, and can be applied to chip characteristic analysis, high and low temperature temperature change test, temperature impact test, failure analysis and other reliability tests. Through long-term multi working condition verification, it meets the requirements of various production and engineering environments.