In the chip design stage, it is necessary to consider how to support the testing requirements of the chip. Testers need to prepare a TestPlan at the beginning of the chip design, plan the testing content and methods based on the specifications and parameters of each chip, and discuss with DFT engineers and other designers; DFT logic typically includes SCAN, Boundary SCAN, various BIST, various Function Test Modes, and some Debug Modes.

What are the main tests that need to be conducted before using the chip?

DC performance testing

·Continuity Test

·Continuity Test

·Leakage Test (IIL/IIH)

·Power Supply

·Current Test (IDDQ)

·Other Current/Voltage Test (IOZL/IOZH, IOS, VOL/IOL, VOH/IOH)

·LDO, DCDC power supply testing

Taking Continuity testing as an example, it mainly checks whether the pins of the chip and the connection with the machine are intact. During the test, both the pins of the DUT (Device Under Test) are equipped with upper and lower protective diodes. Based on the unidirectional conduction and cut-off voltage characteristics of the diodes, the current is pulled/poured, and then the voltage is tested to see if it is within the set limit range. The entire process is completed by the instruments PE (Pin Electronics) in ATE.

AC parameter testing

Mainly AC Timing Tests, including check of timing such as Setup Time, Hold Time, Propagation Delay, etc

Special Peripheral Function Test (ADC/DAC)

Mainly involves mixed digital/analog to digital testing to check if the ADC/DAC performance meets expectations, including static and dynamic testing:

Static Test – Histogram method (INL, DNL)

Dynamic Test - SNR, THD, SINAD

Digital functional testing

This part of the testing mainly involves running test vectors (Patterns), which are generated by DFT engineers from the design company using the ATPG (auto test pattern generation) tool.

Pattern testing basically involves adding excitation, capturing the output, and comparing it with the expected value. Corresponding to Functional Test is Structure Test, which includes Scan, Boundary Scan, etc.

SCAN is used to detect whether the logical function of the chip is correct

Boundary SCAN detects whether the chip pin function is correct

BIST (Build In Self Test), check if the read and write functions of internal storage are correct.

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